Interpreting the delay report

The compilation report includes a section called the delay report, which provides important information about the signal processing delays in your design.

The delays are computed by tracing the signal path from a source (typically an analog input, or possibly a signal generator) to a sink (typically an analog output, but possibly a device that combines inputs such as a mixer).

Signals pass through an A/D converter (which has a delay that is included in the computation) to a DSP; they may then be passed on one or more times to other DSPs. Each of these transfers adds to the delay. These transfers may be between DSPs on the same NioNode, or may be to another NioNode via an XDAB connection. The signal is then sent out through a D/A converter, which again adds to the delay. All these delays are totaled. All possible paths are computed, from every input to every output. The delay report identifies the maximum delay found, as well as the minimum delay. The information is shown as a period of time (in milliseconds) and number of samples (for example, 72z is 72 samples of delay).

Tips:

• If you select the details check box, each individual delay is reported for every input and output connector on each device.
• You can click on the delay time to highlight the device doing the combining in your project. This information can be useful if you are doing delay sensitive combining, such as a mix-minus. Typically, if you are not doing a mix-minus you can ignore all these groups.

The report is presented in alignment groups. The most important alignment group is the analog output group. This group reports the minimum and maximum delay from any analog input to any analog output. For each combining device, such as a mixer, additional alignment groups are created. Each of these groups is identified by a device ID.

Notes:

• If you select Auto-compensate signal delays in the project properties, the report will still report minimum delays, but will indicate they have been compensated to the longest delay time.
• The delay reported for the analog outputs is slightly high, about 410uS (.41ms) at 48k.
• AES cards are included in the analog output group. As above, the actual delay will be slightly less than the reported delay.
• Delay lines in the design are not included in the delay calculation as the delay length is variable and under the user's control.
• CobraNet delays are not computed. You will need to add the actual CobraNet delay to the delays reported in the CobraNet group.